Computer Architecture Chat (ArchChat)


ArchChat is a study group by graduate students at the University of Maryland who are interested in computer architecture related area. During the meeting, we read and discuss papers from the recent top conferences. ArchChat is open to every graduate student.

Current Activities

Objective Understand current research issues and discuss future research directions on computer architecture
Place AVW4158
Time Wednesday 2:00pm - 3:00pm

2005 Fall

Date Title Author Presenter
Nov 2 Characterization of TCC on Chip Multiprocessors Austin McDonald, et al Wanli Liu
Oct 26 Opportunistic Transient-Fault Detection Mohamed A. Gomaa, et al Xuanhua Li
Oct 12 High-Speed Power-Performance Co-Simulation for SoC Designs Ankush's practice proposal talk Ankush Varma
Sep 28 Improving energy efficiency by making DRAM less randomly accessed Hai Huang, et al Ohm
Sep 21 Hill-climbing SMT processor resource scheduler Choi' recent research Seungryul Choi
Sep 14 VLIW Instruction Scheduling for Reduced Code Size Steve' practice job talk Steve Haga

2005 Summer

Date Title Author Presenter
Aug 16 Continual Flow Pipelines Srikanth T. Srinivasan, et al. Sada
Aug 2 Techniques for Efficient Processing in Runahead Execution Engines Onur Mutlu, et al. Sean
July 26 Use-Based Register Caching with Decoupled Indexing J. Adam Butts, et al. Choi
July 19 Continuous Optimization Brian Fahs, et al. Sumesh
July 12 Memory Predecryption: Hiding the Latency Overhead of Memory Encryption Brian Rogers, et al. Sada
July 5 Impulse Building a Smarter Memory Controller John Carter, et al. Brinda
June 28 The V-Way Cache : Demand-Based Associativity via Global Replacement Moinuddin K. Qureshi, et al. Ohm

2005 Spring

Date Title Author Presenter
May 23 SYSim: The Complete-System Simulator for Memory System Performance and Power Studies Ohm's Ph.D. research proposal Nuengwong Tuaycharoen (Ohm)
May. 2 Dynamically controlled Resource Allocation in SMT Processors F. J. Cazorla, et al. Seungryul Choi
Apr. 25 A Holistic Approach to DRAM Computer Engineering Colloquium Bruce Jacob
Apr. 18 A scalable approach to thread-level speculation J. Greggory Steffan, et al. Xuanhua Li
Apr. 11 Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage E. Grochowski, et al. Brinda Ganesh
Apr. 4 Memory Allocation for Scratch-pad based Embedded system Sumesh's recent research Sumesh Udayakumaran
Mar. 28 Transactional Memory Coherence and Consistency (slides) Lance Hammond, et al. Abdel-Hameed A. Badawy
Mar. 14 VLIW Instruction Scheduling for Code Size Based of Optimal Approaches Steve's Ph.D. Defense Steve Haga
Mar. 7 Perceptron-based Confidence Estimation Mike's recent research Michael David Black
Feb. 21 Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams Michael Bedford Taylor, et al. Wanli Liu
Feb. 14 Extended Split-Issue: Enabling flexibility in the hardware implementation of NUAL VLIW DSPs Bharath Iyer, et al. Sadagopan Srinivasan
Feb. 2 Conjoined-core chip multiprocessing Rakesh Kumar, et al. Seungryul Choi



  • Kursad Albayraktaroglu
  • Amit Apte
  • Abdel-Hameed A. Badawy
  • Michael David Black
  • Seungryul Choi
  • Brinda Ganesh
  • Aamer Jaleel
  • Jaeyong Lee
  • Sean Ryan Leventhal
  • Xuanhua Li
  • Wanli Liu
  • Priyanka Rajkhowa
  • Sadagopan Srinivasan
  • Nuengwong Tuaycharoen
  • Sumesh Udayakumaran
  • Joon-Hyuk Yoo

  • Interesting Papers

    (Thanks to Manoj Franklin, Donald Yeung and Sadagopan Srinivasan for suggestions on good papers.)
  • Exploiting ILP, TLP, and DLP with the polymorphous TRIPS architecture , Karthikeyan Sankaralingam, Ramadass Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, Doug Burger, Stephen W. Keckler, Charles R. Moore, ISCA 2003
  • WaveScalar , Steven Swanson, Ken Michelson, Andrew Schwerin, Mark Oskin, Micro 2003
  • Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams , Michael Bedford Taylor, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matt Frank, Saman Amarasinghe, Anant Agarwal, Walter Lee, Jason Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jason Kim, ISCA 2004
  • Clock rate versus IPC: The end of the road for conventional microarchitectures , Vikas Agarwal, M.S. Hrishikesh, StephenW. Keckler, Doug Burger, ISCA 2000
  • The optimum pipeline depth for a microprocessor , A. Hartstein, Thomas R. Puzak, SIGARCH 2002
  • Manoj Franklin's 759M reading list
  • Manoj Franklin's 698B reading list

  • Managed by Seungryul Choi (choi at cs dot umd dot edu)